The present invention relates to a storage device for a digital computer, especially to a buffer storage including a swapping circuit for store control.
A conventional computer employs a buffer storage (BS) with a relatively small capacity but with a high speed comparable to the speed of a central processing unit (CPU), while a main storage (MS) has a relatively low speed. For this buffer storage, the store operation is controlled according to a swapping control, as will be explained below.
When a write request is generated, store data is written into the BS in response to that request, but the data is not stored into the MS in response to the request. The renewed data in the BS is transferred to the MS later on, as follows. Let us assume that a data block DATA 1 is already stored in the BS includes store data resulting from a write request. When a read request for the BS is generated within the CPU and it becomes necessary to transfer a data block DATA2 which includes the requested data from the MS to the BS because the data block is not already contained in the BS, a location where the data block DATA2 is to be stored is determined according to a predetermined rule. If it happens that the location where the data block DATA1 is stored is selected to be the location for storing the data block DATA2, the data block DATA1 must be transferred from the BS to the MS. However, the data block DATA1 includes the store data, as already assumed, and therefore, the contents of the data block DATA1 are different from the contents thereof when the block was originally transferred from the MS. Thus, it becomes possible to reflect the result of the previous write operation into the BS upon the MS, by transferring the data block DATA1 from the BS to the MS before the data block DATA2 is stored into the BS. In other words, the data block DATA1 is exchanged with the data block DATA2. This exchange is called swapping.
It is to be noted that swapping does not always follow a BS access request. For example, if a location where a data block DATA3 which has not received a store operation is selected as a location for the data block to be received from the MS, it is not necessary to transfer the data block DATA3 from the BS to the MS because the MS already has a correct copy of that data block. Therefore, it is desirable to select a location where a new data block not in the BS is to be stored in such a way that swapping is not required, since this will save operating time. According to the prior art, however, this determination is performed irrespective of whether or not swapping is required. For example, see Japanese Laid-Open Patent Application No. 52-2228 (1977).
Furthermore, it is to be noted that the processing time for swapping depends upon the situation. Usually, the MS comprises plural banks which can be accessed in parallel to each other. If the data blocks DATA1 and DATA2 belong to different banks, reading of the data block DATA2 from the MS can be performed in parallel with storing of the data block DATA1 into the MS. Therefore, the swapping time is short. If the two data blocks belong to the same bank, the storing operation is performed after the reading operation. Therefore, the swapping time is longer. This shows that it is desirable to select the swapping location so that the swapped data blocks belong to different banks. According to the prior art, however, such determination is made irrespective of whether or not this bank conflict occurs.